Low temperature poly-silicon thin film transistor (LTPS TFT) has been widely used in a display field, due to its advantages such as high mobility and stability.
With reference to FIG. 1, a fabrication process of the low temperature poly-silicon thin film transistor comprises: forming a buffer layer 2′ and a poly-silicon thin film on a base substrate 1′, and patterning the poly-silicon thin film to form an active layer 3′ of the thin film transistor; forming a gate insulation layer 4′ on the active layer 3′; forming a gate electrode 5′ on the gate insulation layer 4′; and then injecting ions into the active layer 3′ to form a source region and a drain region; depositing an interlayer insulation layer 6′ to cover the gate electrode 5′ and the gate insulation layer 4′; forming contact holes directly reaching the source region and the drain region; and then forming a metal layer 7′ and patterning the metal layer 7′ to form a source electrode and a drain electrode, the source electrode and the drain electrode being connected to the source region and the drain region respectively. In the fabrication process of the above TFT, dangling bonds that have a non-bonding orbital will be generated at an interface between the poly-silicon thin film and the gate insulation layer, and the dangling bonds will lead to performance degradation issues of the thin film transistor, such as a drop in carrier mobility, an increase in threshold voltage, etc.
In general, hydrogen is supplied to the dangling bonds by a hydrogenation process to passivate the dangling bonds at the interface between the poly-silicon thin film and the gate insulation layer. However, since the source and drain electrodes are formed by Titanium-Aluminum-Titanium (TiAlTi) thin film with low resistivity, the hydrogenation process will cause reaction between Ti and Al to form TiAl3 with high resistivity, which eventually results in a relatively high voltage of a common ground terminal, and makes a negative impact on the TFT finally formed.